A Taxonomy of Memristor Technologies

“Memristor” is one word covering a lot of unlike things: a hafnium-oxide cell in a foundry process, a phase-change alloy that melts and recrystallizes, a ferroelectric tunnel junction that flips polarization, a chalcogenide cell that grows and dissolves a silver filament. If you are choosing a device, or reading a paper about one, “is it a memristor” is the wrong question. Ask instead what physically changes inside it when the resistance changes. Everything else follows from that: speed, endurance, energy, whether it needs forming, whether it drifts.

So this is a taxonomy. Twenty families, sorted by switching mechanism rather than by material, with each one’s strengths and weaknesses in a sourced sentence. There is no composite score and no ranking, because every axis trades against another: endurance against energy, speed against multilevel precision, density against availability.

A disclosure: I work at Knowm, which sells one of the twenty, the chalcogenide self-directed-channel device. It is coded, sourced, and scored the same way as the other nineteen.

Four ways to switch#

The obvious way to organize this many families is by material: oxides in one pile, chalcogenides in another, organics off to the side. I tried that first. It falls apart, because you can’t predict how a device behaves from what it’s made of. The filament-versus-interface split most people reach for is a property of the stack, not the material [Dittmann, Menzel & Waser 2021]. Ielmini has put hafnium oxide, titanium oxide, a hafnium/zirconium bilayer and nickel oxide on a single reset-current curve. Aluminum oxide won’t even hold still inside one stack. At 8 nm it is the switching layer; at 2 nm the same film “behaves as a tunnel barrier” and does nothing (Banerjee 2017). Shrinking an Ag/Al₂O₃/Au cell flips it from nonvolatile memory to volatile threshold switch (Huang 2023).

Tungsten trioxide is the worked example. WO₃ shows up in this literature as three different devices, and the only thing that changes is the electrode. Kügeler’s Cu/WO₃/Pt is a conductive-bridge cell: copper dissolves in and grows a metal filament, and the paper calls the WO₃ “a solid electrolyte.” Chang, Jo & Lu’s Pd/WO₃/W has no active metal. Oxygen vacancies do the switching, forming-free and Schottky-limited. Shang’s Au/WO₃/FTO is a plain Schottky switch with a window of only 1.5–10×. Same compound, three mechanisms, sorted by the contacts.

So I sorted on what physically moves when the resistance changes. Every family then lands in one of four groups. The first cut is whether ions move at all. Among the ones where they do, whether the moving thing is a metal atom or an oxygen vacancy:

One family sits across a line on purpose: the perovskite-oxides are oxides that switch at an interface, so the tree files them with the field-flip devices rather than their chemical cousins. NiO nearly did the same, since it switches thermally, unlike anything else in the oxide group. Once every cell was source-verified, the tree kept it just inside the oxide clade, on its outermost branch.

① Metal cations — the conductive bridge#

Families: CBRAM/ECM · the self-directed channel (SDC) · silicon-oxide and nanowire cells · organic and biomaterial films · halide-perovskite and 2D layers.

An active electrode of silver or copper oxidizes, its ions drift into the film, and they plate out into a metal filament that bridges the two contacts. Reverse the bias and the bridge dissolves. You can grow that filament a little at a time, so at low current the group switches gradually, which makes it the natural home for analog synapses. The cost is variability, because a filament that grows by chance never grows the same way twice, and retention that rests on how stable a thin metal thread is. Knowm’s device belongs to this group: the SDC grows a metal filament through a Ge₂Se₃ chalcogenide. How snugly it fits is a section of its own.

Start from: Valov, Waser, Kozicki & Kaeriyama, “Electrochemical metallization memories” (the review that defines the class) · Schindler, Valov & Waser, “Faradaic currents … Ag–Ge–Se … electrochemical metallization” · Oblea & Campbell, the Boise State papers that characterized the SDC.

② Oxygen vacancies — the valence-change oxides#

Families: TaOₓ · HfOₓ · TiO₂ · ZnO · WOₓ · the perovskite-oxides · NiO (the exception, below).

No foreign metal moves here. The oxide’s own oxygen migrates, leaving a trail of vacancies that carries the current. In the binary oxides that trail is a filament pinned by a Schottky barrier at the contact. In the perovskites it spreads across the interface. This is the workhorse of commercial RRAM: foundry-compatible, sub-nanosecond in tantalum oxide, and the endurance champion of the field. The famous trillion-cycle number is a TaOₓ result. Its weakness is analog depth, because a vacancy filament tends to snap between two states rather than glide. Its other weakness, as the scorecard section shows, is endurance figures that don’t always survive a careful count. NiO is the exception. It’s an oxide, but it switches thermally (unipolar, thermochemical), so the tree hangs it on the outermost branch of the oxide clade, one step from its chemical neighbors.

Start from: Waser & Aono, “Nanoionics-based resistive switching memories” · Waser, Dittmann, Staikov & Szot, “Redox-based resistive switching memories” (the paper that names the ECM/VCM/TCM scheme this whole taxonomy leans on) · Lee et al., the Ta₂O₅ bilayer endurance landmark · Ielmini, thermochemical switching for the NiO branch.

③ No ions move — phase and structure#

Families: phase-change memory (GST) · Mott insulators (VO₂, NbO₂).

Nothing is transported across the cell. Phase-change memory melts a chalcogenide and either freezes it amorphous or lets it crystallize, and the two phases differ in resistance by orders of magnitude. A Mott device flips an insulator to a metal through an electronic transition. Both are fast and endurant, and phase-change has shipped at scale (Intel/Micron’s Optane). The costs are specific: melt current and slow resistance drift for phase-change, volatility for the Mott switch, which makes it a selector or an oscillator more than a memory.

Start from: Ovshinsky, the 1968 origin of reversible chalcogenide switching · Wong et al., “Phase Change Memory” and Le Gallo & Sebastian, device physics · Kumar et al., the NbO₂ Mott memristor.

④ No ions move — polarization, spin, and gating#

Families: ferroelectric tunnel junctions (HfO₂/HZO) · spintronic magnetic tunnel junctions · ECRAM (the outlier).

Here a field flips a state without growing anything. A ferroelectric junction reorients its polarization, which changes the tunnel resistance. A magnetic tunnel junction switches the magnetization of one layer, the basis of the STT-MRAM already shipping in volume. ECRAM sits here uneasily. It does move ions, but light ones, protons or lithium, gated into a channel by a third terminal, so it behaves like an interface modulator rather than a filament. It is the most linear analog device in the tree, at the cost of a three-terminal cell that’s hard to make dense.

Start from: Chanthbouala et al., “A ferroelectric memristor” and Böscke et al., ferroelectricity in HfO₂ · Ikeda et al., the CoFeB–MgO tunnel junction and Kent & Worledge, a review of STT-MRAM · Talin et al., the ECRAM review and Onen et al., nanosecond protonic resistors.

One family fits none of the four. Carbon/graphene switches by rearranging carbon bonds into a conductive filament, with no ion moving, no phase melting and no field flipping a state. I left it ungrouped on the tree rather than force it into a box.

In order of first appearance#

The tree says nothing about time, and time corrects something almost everyone gets backwards. Here are the same families ordered by when each one first switched in the literature, rather than when it was first called a memristor:

Two of these families and the whole ECM lineage that became CBRAM had working devices in the lab before Leon Chua wrote down the memristor in 1971, and long before HP’s 2008 paper stapled his name onto the field. “Memristor” is a 2008 rebrand of phenomena some of which are sixty years old. The self-directed channel (SDC) is the mirror image. Kristy Campbell invented it at Micron in 2006, refined it at Boise State, and Knowm licensed that refinement in 2015. But it runs on the metal-in-chalcogenide chemistry Hirose was already growing silver dendrites in back in 1976.

The timeline goes quiet after about 2016. I went looking for the memristor types invented in the last decade and mostly couldn’t find any. The one plausible new arrival, the diffusive memristor in 2017, turns out to be a volatile version of CBRAM: a 2017 branch of a 1976 family. Everything else the decade produced is a subclass of something already on the chart, such as ferroelectric hafnium oxide, proton-shuttling ECRAM and two-dimensional ferroelectrics, plus a great deal of hard engineering: shrinking the cells, getting them into real foundry processes, shipping embedded RRAM and MRAM in volume, building analog in-memory-computing hardware. That is the phase where a field stops discovering new physics and starts learning to manufacture the physics it has. That is also the decade the SDC’s commercialization sits in.

Here are the two figures combined, the tree’s kinships drawn on the timeline’s calendar, the way natural-history books draw the dinosaurs. Four limbs, every branch dated, and a right edge where the newest growth is a 2017 offshoot of a 1976 branch:

Where the deepest split is contested#

One place in the tree stands on contested ground, and it is the deepest split. The trait underneath it, filamentary switching against interface switching, is not the clean either/or the figure makes it look.

“it is also called interface-type switching in the literature. However, this should not be confused with the interface-type switching introduced above… also filamentary switching may be interface dominated.”

— Dittmann, Menzel & Waser, Advances in Physics 70(2), 2021 — rejecting Sawa’s label by name

Waser’s group splits what most people treat as one axis into two independent ones. Where along the current path the action sits, near an electrode or through the bulk, is a separate question from whether the conducting path is a narrow filament or fills the whole area. A device can be filamentary and interface-dominated at once.

My first draft of the matrix got this wrong. I had coded switching as a single either/or trait, filamentary versus interface, which forces the false choice Waser warns against. That trait drove the tree’s deepest branch, so the error was load-bearing. I split it into the two axes he names: geometry (filament or area-dependent) and region (interface or bulk). The tantalum- and hafnium-oxide cells show the difference. They are filament and interface-dominated at the same time, an oxygen-vacancy filament whose resistance is set by a Schottky barrier at the contact, and the old single trait couldn’t say that. The perovskites are area-type in PCMO but filament-at-dislocations in strontium titanate, so they now code as split on geometry instead of being forced into one value.

Where the SDC lands: next to CBRAM#

The same coding rules apply to our own device. I coded the self-directed channel from the same kinds of sources as the other nineteen and let the clustering place it. It lands next to conductive-bridge RRAM.

Eight of the ten traits are identical, and the two that differ are small. The SDC’s channel forms softly under normal operating sweeps instead of needing a separate high-voltage forming step, and it can run either volatile or nonvolatile. That is one and a half steps out of ten, since the volatility difference counts as a half-step when both devices can run nonvolatile. Several pairs the field files as separate families are further apart than that. Kristy Campbell’s 2019 paper places it in the ECM subcategory, not off on its own.

The patent record says it more plainly than the matrix does. Campbell invented the SDC in 2006 while she was at Micron, and Micron was at that point a licensee of Kozicki’s programmable-metallization-cell patents, the ones that became commercial CBRAM. Her own Micron CBRAM patents come two years before the SDC ones by the same hand. The SDC is not a rival lineage that happens to resemble CBRAM. It is what a CBRAM program produced when it went looking for a cell that was easier to manufacture. Those two original patents, US 7,030,405 and US 7,151,273, have since expired.

The people who defined the category had already said the same. The self-directed channel grows a metal filament through a germanium-selenide chalcogenide, Ge₂Se₃, and germanium-selenide is one of the canonical electrochemical-metallization electrolytes. Schindler, Valov, and Waser titled a 2009 paper “Faradaic currents during electroforming of resistively switching Ag–Ge–Se type electrochemical metallization memory cells”: the SDC’s material system, filed under ECM in the title. Michael Kozicki, who invented the programmable-metallization cell that became commercial CBRAM, co-authored earlier work on the same Ag–Ge–Se system. Both of the names most responsible for defining and commercializing conductive-bridge memory had classified the SDC’s electrolyte as ECM years before I coded a single trait. The mobile metal in our parts isn’t always the silver they used, but the electrolyte and the switching mechanism are.

Put the lineage on a timeline: a young device built on old chemistry.

What distinguishes the SDC inside the ECM family is in the same matrix. Soft forming and dual volatile/nonvolatile operation are the two traits that separate it from CBRAM, and the scorecard below shows what they do in practice. The mechanism under the soft forming is the SDC’s actual contribution. CBRAM has to photodope silver into its glass, and how much silver got in there decides how the cell behaves. The SDC stacks a metal-selenide layer on a chalcogenide whose non-chalcogen atoms are homopolar-bonded, Ge₂Se₃, and that geometry supplies the channel without the photodoping step. The device is then far less sensitive to the dose. That is what made it easier to manufacture, and it is why the metal doped into the layer can be changed to tune the device instead of just to make it work at all.

OK, so which memristor is the best?#

I wanted a spec matrix behind the tree, with endurance, speed, retention and energy for each family, and that is where I got stuck. Those numbers aren’t measured the same way twice, so most of them can’t be compared. I spent longer chasing that down than on anything else in this project.

The cleanest example holds everything constant. Shang’s 2010 paper reports one device at about 100 cycles of endurance by DC voltage sweep and about 10⁴ under pulses. Same device, two orders of magnitude apart, and only the measurement changed. Simanjuntak’s 2012 zinc-oxide cell is worse: over a million pulsed cycles with no window loss, but the window collapses after about 100 cycles when the same film is swept with DC. Ten thousand times, from measurement mode alone. The field admits it in a review-table footnote, “Unless specified, endurance was measured using DC voltage sweeping mode”, and only one of that table’s fifteen rows specified otherwise.

The bigger problem is what happens to the famous 10⁹, 10¹⁰ and 10¹² cycle counts that anchor every comparison when you count the evidence behind them. Lanza and about thirty co-authors, Waser and Ielmini and J. Joshua Yang among them, already did that count: for each landmark claim, how many resistance readings were plotted, against their own recommended minimum of fifty per decade. Almost every landmark claim comes in under that bar. The two that clear it are the two where the device was read on every cycle, which are also the most modest numbers in the set. The celebrated 10¹² rests on about seventy-five readings across twelve decades, so more than 99.999% of that trillion was never checked. That is not fraud and the paper was never retracted. It shows the pulse train ran, not that the device switched each time. The reliability labels are Lanza’s call, not mine.

Retention and multilevel storage are no better. Every “ten years at 85 °C” I found is an Arrhenius extrapolation from a few hours of hot baking, not a measurement. Lanza’s 2019 methods paper says ten-year retention tests “are not doable” in as many words. The multilevel demonstrations that promise four or six bits fall apart under statistics too. Lanza shows median windows of 100× with no gap between the tails of adjacent levels once you include cycle-to-cycle spread.

So I adopted one rule for the rest of this post, and I would suggest it for reading anyone’s memristor spec sheet: print the protocol next to the number, or print “not comparable.” Where the spec matrix quotes an endurance or retention figure, it carries its measurement conditions with it.

The scorecard works around both problems: measurements that can’t be compared, such as a DC sweep against a pulse train against an Arrhenius extrapolation, and properties where the evidence is thin or missing. Instead of a number pretending to be comparable, each family gets one to five stars on seven axes. A star grades the family’s best evidenced value with its measurement conditions attached. A dash means the property is not reported, which is a gap rather than a zero, and there are more of those than you’d expect. The full rubric, the threshold for each star, and the source behind every cell are in the repo. Hover any cell and it will tell you the conditions and where the number came from.

The seven axes are the ones you’d put on a wishlist for an ideal device: endurance, retention (shelf life), analog depth (graded states you can set and keep), switching speed, energy per switch, on/off window, and whether you can integrate or simply buy one. Yield belongs on that wishlist too, but I left it off because almost nobody reports it, us included, and a column I would have to invent is worse than no column.

Read across any row and it is jagged. There is no ideal device. The families that ship at scale, magnetic RAM and phase-change and tantalum oxide, get their endurance and manufacturability at the cost of a tiny read window or no real analog depth. The ones that make the best artificial synapses, the interface perovskites and the electrochemical-RAM cell, can barely hold a state overnight.

The radar version draws the same seven axes and the same numbers as one polygon per family:

You can almost read a family’s character off the outline. The fat lopsided wedges are the commercial parts, strong on a few axes and pinched to nothing on the rest. The narrow spikes are the lab synapses, brilliant on analog and empty everywhere else. The rounder, smaller polygons in the top group, the self-directed channel and its CBRAM neighbor, are the generalists: decent across a lot of axes, best-in-class on none.

Which brings me back to the question that set this comparison off: someone told me oxide memristors “aren’t very good.” Knowm, where I work, has published its own scorecard grouped by mechanism, with the self-directed channel out ahead. Rather than take our own chart’s word for it, here it is rebuilt on independently-sourced numbers:

Most of our chart survives the fact-check. The parts that don’t are the interesting ones. Through the analog-synapse lens it is drawn for, the self-directed channel does beat CBRAM on gradual analog and uniformity, the two things that matter for a synapse. Uniformity here means repeatability in both senses — device-to-device, where two parts respond the same way to the same pulse, and cycle-to-cycle, where one device responds the same way on every switch — and a filament that grows by chance is worse at both. Two of our own axes don’t hold up. CBRAM beats us on raw on/off window, about 10⁹ from its metallic filament against our 10³. And the oxides aren’t “weak” in any general sense. They are weak on analog, and strong on endurance, speed, energy and manufacturability, which is most of what a memory device is asked to do. So the oxides struggle at gradual analog synapses, and as memory they are the best thing shipping. The self-directed channel goes the other way. No foundry, and switching energy measured at the packaged-part level rather than the cell level, in exchange for low-voltage, forming-friendly, high-temperature analog operation in a component you can order with a datasheet.

One caution from the top of this section carries over. The endurance, retention, and energy columns are measured under protocols that don’t compare: AC sine cycling for the channel, pulsed-write-to-a-window for the oxides, DC sweeps for the soft-matter families, voltage-stress extrapolation for the magnetic cells. Compare the shapes, not the third decimal. The scorecard maps where each family made its tradeoffs.

Who publishes these, and who owns them#

I ran the families through Google Patents the same way I ran them through OpenAlex for the papers, and lined up the institution leading each family’s literature against the one holding its patents. They are almost never the same. The universities publish: the Chinese Academy of Sciences, Seoul National, Jülich. The memory-IP houses and product companies patent: Monolithic 3D, Intermolecular, Intel, Macronix, Samsung. In nine of the ten families charted below, the top name flips when you cross from papers to patents:

The one exception is our own device, and it needs stating carefully. For the SDC, the lab that leads the published research, Boise State, is also the lab that holds the live patent, which Knowm licenses. One source both makes it and studies it, which is also why you can buy it as a part rather than fabricate it yourself. The exception applies to the IP in force, not to the whole history. The two original SDC patents were filed at Micron in the ordinary corporate way, and they have expired. One caveat on this figure: it shows who leads, not how many, because the patent counts turned out to be uselessly sensitive to wording. Panasonic returns 13 hits for “memristor,” 304 for “ReRAM,” and twenty thousand for “resistive random access memory,” so any ranking by count would be a ranking of vocabulary. The leaders are robust. The numbers aren’t.

Can you actually buy one?#

Availability is the one axis where the SDC stands alone, so the claim needs stating precisely. Every family in the star matrix carries a maturity tag, and they sort into four tiers:

• Discrete part — buy it and put it on a bench. The SDC, fabricated at Boise State in Kris Campbell’s process and sold by Knowm as a packaged component. As far as I can find, it is the only memristor available this way.
• Commercial, but embedded. Panasonic shipped TaOₓ ReRAM inside microcontrollers, Adesto shipped Ag-chalcogenide CBRAM, phase-change went into Intel’s Optane, and STT-MRAM ships in volume. You cannot order any of them as a component. They are welded inside a chip.
• Foundry / IP, or fab demo. HfOₓ is reachable through foundry processes and licensed IP (Weebit, TSMC-embedded) if you have a foundry relationship. WOₓ is the odd case: Macronix ran self-aligned 60 nm cells, 3D sidewall stacks, and MLC chip demos on it, the most industrialized memristor that never shipped. You can’t get one either way.
• Lab-only. TiO₂ — the most-studied material in the field — the 2D and carbon films, the perovskites, ECRAM: you fabricate them yourself or you don’t have them.

So the precise claim is not “the only commercial memristor.” Panasonic, Adesto and the MRAM vendors got there first, in embedded form. It is that the SDC is the only memristor you can buy as a discrete component and experiment with directly. It shows in the literature. The corpus behind this article holds 340 papers from the last decade that engage the SDC directly, enough independent work that mapping it took two posts of its own (Part 1, Part 2). For every other family, “the device” is hundreds of different devices from hundreds of cleanrooms that share a formula, and a shared formula is not a shared device, as the three WO₃ cells showed. For the SDC it is one device from one fab, so when a lab in Chile and a lab in Poland disagree about it, they are disagreeing about the same object.

Reproduce it#

The tree is computed in your browser. The trait codings are in the page source as a plain array, one row per family and ten states each, and the clustering is thirty lines of UPGMA over Hamming distance running on that array. Change a cell and the topology recomputes, so if you think WOₓ is miscoded you can see in ten seconds what your coding does to the tree.

The paper counts are one OpenAlex API call per family. Here’s the zinc-oxide one exactly as I ran it:

https://api.openalex.org/works?filter=title_and_abstract.search:ZnO AND (memristor OR memristive OR RRAM OR ReRAM OR "resistive switching"),from_publication_date:2008-01-01,type:article|review|preprint&per-page=1

The count is in meta.count of the response, 991 as of 2026-08-24. Three things to watch out for, all of which bit me:

1. Use title_and_abstract.search inside the filter, not the top-level search= parameter. The latter searches full text and inflates everything: the same ZnO query returns 5,226 that way, five times the real figure. I made this mistake on my final counting pass and only caught it because I knew what the number should be.
2. Date-stamp every count. OpenAlex re-types works upstream. My HfOₓ count moved from about 1,050 to 1,277 in five weeks with an identical query. No count in this post is “the” number. Each is the number on its stated date, under its stated filter.
3. The free tier allows roughly a hundred search requests per day, resetting at midnight UTC. A full recount of twenty families fits in one day with room to spare. A cold corpus enrichment does not.

Further resources#

• Dittmann, Menzel & Waser, “Nanoionic memristive phenomena in metal oxides: the valence change mechanism” (Adv. Phys. 2021) — the geometry/region framework this matrix is coded against.
• Waser, Dittmann, Staikov & Szot (Adv. Mater. 2009) — the paper that names ECM/VCM/TCM.
• Lanza et al., “Standards for the Characterization of Endurance in Resistive Switching Devices” (ACS Nano 2021) — the counting standard behind §7.
• Campbell, “Self-directed channel memristor for high temperature operation” (2017) — the SDC device paper, from the Boise State lab that refined and fabricates it.
• memristor-models-4-all — SPICE and Verilog-A models for many of the families above, including the SDC’s MSS model.
• On this site: A Decade of Knowm SDC Memristor Literature, Part 1 and Part 2 — the corpus this article’s methods grew out of — and How 374 Papers Build a Signed Synaptic Weight, the differential-pair story the cladogram’s §① keeps pointing at.

A final word#

Some of these codings are my best reading of a literature that doesn’t always agree with itself. If you spot a mistake, a miscoded trait, a wrong spec, a misfiled family, tell me and I will fix it. The tree is computed, so a correction moves the branches for everyone.

And I’d like your answer to the question the scorecard won’t settle: which memristor is the best? For your workload, under your constraints, which axes matter and which family wins them? If you have put any of these on a bench, I want to hear what the datasheets didn’t tell you.