knowm.ai

The Index

We're building a thermodynamic neural processor in the open, one chapter at a time. Read straight through from Chapter 1, or expand any chapter below for the short version and jump in where you like. The reference pages stand on their own.

Chapters

Chapter 1

Transforms will be Assimilated

Ship synapses. Stream transforms. Forget weights.

The thesis for the whole series: the unit of intelligence worth shipping isn't the weight, it's the transform. Today's AI burns enormous energy computing weights and hauling them through memory hierarchies, but weights are a means, not the thing that matters. A synapse isn't a number — it's a physical adaptive element that unites memory and processing, and ASSIMILAATE is the plan to ship that.

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Chapter 2

Before I Knew of the Word Memristor

Twenty-five years assembling the synaptic solution.

The origin story. How a frustrated undergraduate physics major wandered into neural networks, concluded that separating memory from processing was the central barrier to AI, and went looking for a way to build a synapse — years before he'd heard the word memristor. The first Knowm patents come out of this, and the thread runs straight to everything that follows.

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Chapter 3

The Thermodynamic Bit

Nature builds with one primitive, at every scale, and you've stared at it your whole life without actually seeing it.

The builder block you've stared at your whole life without seeing. Across wildly different scales, Nature organizes matter the same way: free energy dissipating through adaptive pathways that compete for the flow. This chapter names that pattern the thermodynamic bit (kT-bit) and sets it down as a computational primitive we can bring into electronics.

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Chapter 3b

The Thermodynamic Bit, Derived

Store a weight in two memristors instead of N bits, and optimal annealing, Bayesian inference, and native probabilistic sampling become a property of matter.

The kT-bit, derived. Where Chapter 3 names the pattern, this one builds it from two memristors: how a differential pair plays the role of a synapse, why the pinched hysteresis loop is what defines a memristor, and how wiring two of them as a voltage divider gives you a weight that holds more than any single number can.

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Chapter 3c

The Thermodynamic Bit, Built

Simulate a memristor synapse, draw it polygon by polygon, and send it to the fab — the part of building neuromorphic hardware where a circuit idea becomes silicon.

The kT-bit, built. The journey of one Knowm synapse from a circuit you simulate on a laptop, to a layout drawn by hand polygon by polygon in Electric, to a real device you can probe on the bench. The unglamorous reality before any fab gets involved: somebody has to draw every electrode and via.

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Chapter 4

The Neural Lane

kT-RAM is the genus. The neural lane is a species.

The genus gets its first species. kT-RAM is just addressable kT-bits plus an instruction set, where reading the memory is computing with it; the neural lane is one way to build that — shrink a crossbar until the sneak paths can't hurt you, use one memristor at a time, and stack the synapses as voltage dividers onto a shared output line. Which synapses fire is set by an Activation Address Tuple: an ordered list of integers that is the wiring pattern itself, with no routing table in between. Along the way, why communicating continuous values across a neural network was always a fantasy, and why an RGB pixel was an AAT all along.

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Chapter 4b

The Neural Lane Emulator

An open Python emulator of the 2-1 neural lane — its object model and instruction set — checked on a single synapse against the Chapter 3b physics: inertia, evidence-counting, and the read as a thermal sample.

The code arrives. kt-ram-neural-core is an open Python emulator of the 2-1 neural lane, its object model reading like the hardware from the outside in — Core, NeuralLane, UnitCrossbarPair, addressed with AATs the way the real thing is. Collapse it to a single differential pair and you drive the whole fourteen-instruction set by hand: four reads, ten feedbacks, two letters each. On that one synapse the Chapter 3b physics comes right back out — the magnitude as inertia and as a running count of evidence, the read as a noisy thermal sample, and the writable coin P(+) = Φ(w/σ). One pip install, one Colab notebook, start poking.

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Chapter 5

Thermodynamic Logic Gates

When two kT-bits interact on a neural lane under the FF-RU kT-RAM instruction set, attractor states emerge that we identify as logic functions.

Two kT-bits on one lane, driven by nothing but a read and a feedback. Put a second synapse on the neural lane, run the FF-RU pair with no teacher anywhere in the loop, and the node settles into one of a handful of stable states set by its random start and the data it sees. Name each state by the sign of its answer to every input pattern and the name turns out to be a truth table: the attractors are the two-input logic gates. A shared encoding reaches fourteen of the sixteen, one-hot reaches all of them including XOR, and nothing in the lane was ever told what a logic gate is — the blueprint is the structure of the datastream.

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Chapter 5b

Maximizing Noise Margin

An unsupervised AHaH boundary settles where the data points push on the decision line all balance. The nearest points are its support vectors, and the gap they hold open is a noise margin against thermal and read noise.

Chapter 5 found the attractors. This one asks why they sit where they do. Every input pattern pushes the decision boundary away from itself, the push grows as the boundary comes closer, and the boundary settles in the gap where the opposing pushes cancel — equidistant from the nearest patterns on either side. Those nearest patterns are its support vectors, and the node finds them with local updates alone, no teacher and no solver anywhere in the loop. The gap they hold open is a noise margin, the wall that keeps a state a bit instead of bath, and the rule that grows it comes out of the emulator the same way across float, byte, and two stochastic device models.

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Chapter 6

Classification and Thermal Sampling on kT-RAM Neural Lanes

We teach neural lanes to classify labelled data. They learn one example at a time and land on the same accuracy as logistic regression. Then we teach fresh lanes the opposite mapping and read them at temperature: clamp a label, draw a sample.

The lane finally gets an answer key. Three lanes, one per iris species, an A2D encoder that bins each measurement into an AAT, and a three-case instruction routine — drive the right lane up, drive a confident wrong one down, leave a quiet one alone. Read cold, it lands on the same accuracy as batch logistic regression and a linear SVM over the identical encoding, and it misses the same flowers they do. Then turn the read voltage down and the same weights stop issuing verdicts and start drawing samples: teach two banks the opposite mapping, chain them so the second sees what the first committed, and the pair samples a 2D mixture of Gaussians live in your browser.

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Chapter 6b

The Unsupervised Basis Encoder

Learn a codebook with no answer key, provided you limit the run-away positive feedback where the rich get richer. We build and train our first multi-module kT-RAM network, a binarized fashion MNIST encoder/decoder/classifier with thermal sampling.

Take the answer key away from the Chapter 6 classifier and target the read winner instead: each lane drifts toward a prototype and the bank becomes a codebook. Left alone the competition eats itself — an early lucky lane compounds into a monopoly — so two rules hold it open. Exclusion benches a lane that already won this cycle, recruitment drags idle lanes into service, and switching recruitment off partway through lets the codebook prune itself to what the data supports. Sixteen of these groups encode binarized Fashion MNIST into sixteen integers, a decoder and a label read-out learn from that code, and closing the encode/decode loop with read noise as the temperature gives a generator you can run in your browser.

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Reference

Reference

The kT-bit Catalog

Every place in Nature the thermodynamic bit actually shows up — and the ones that only look like it.

A companion to Chapter 3: every place in Nature the thermodynamic bit actually shows up — rivers, vortices, organelles, even markets — each scored against three gates that decide whether it's really a kT-bit, and a fourth that tells you where to look. A working filter, held loosely, with confidence scores where the fit wobbles.

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Reference

The kT-bit Reading List

The thinkers — a chemist, a physicist, a systems theorist, an ecologist, a roboticist — who circled the same primitive the kT-bit names, and where to find their work.

The cross-disciplinary lineage behind the kT-bit. A chemist, a physicist, a systems theorist, an ecologist, a roboticist — thinkers who each described one face of the same primitive, energy self-organizing matter as it dissipates, without quite saying it was one thing. Where to find their work, and how each piece connects.

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Reference

A Decade of Knowm SDC Memristor Literature, Part 1

What the research community did with Knowm's Self-Directed Channel memristor across a decade of papers.

Tim's survey of what the world did with Knowm's memristor. The Self-Directed Channel device has been on sale since 2016, and over a few weeks Tim built a corpus of every paper he could find that uses or cites it — or the MSS model — and ran it through a reproducible mining pipeline. Out came 337 papers: who put a real device on the bench, who extended the model, and where the architecture has barely traveled yet. It's meant as a map for anyone about to work with these devices, generated from a single papers.json you can download and query yourself.

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Reference

A Decade of Knowm SDC Memristor Literature, Part 2

What people actually built with Knowm's Self-Directed Channel memristor — the applications, sorted, and the strange ones.

The other half of Tim's survey: not how much work there is, but what it built. He sorts the corpus into application domains and the map has surprises — the single biggest bucket isn't an application at all, it's people learning to model and measure the part, which is what happens when you're the only memristor anyone can buy. Neuromorphic synapses are the biggest real application and the fastest growing, in-memory logic runs in two separate lineages, and the long tail goes places nobody designed for: an artificial pain receptor, seizure detection from a wristband, CERN trigger electronics, slime molds. The one thing that barely traveled is the differential pair.

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Reference

How 374 Papers Build a Signed Synaptic Weight

A memristor's conductance can't go negative, but a synaptic weight must. I surveyed 374 papers on how the field gets around that — one device, two, or many — and almost everyone reads the weight as a difference.

A memristor's conductance is a positive number. A useful synaptic weight carries a sign. Tim harvested 374 papers to find out how the field actually closes that gap, and the answer is that almost everyone subtracts — one device against a shared reference column, two devices read as a difference, or two banks of many. The device count moves, the subtraction doesn't. The map that comes out names the three wirings by electrode count, 1-2, 2-1 and 2-2, and tells you what each one costs, and the roll call of who builds the shared-node 2-1 runs from Nature Electronics flagships to 28 nm production macros to 3D stacks.

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Automated reader? The machine-readable index is at /llms.txt.